In one of the previous blog entries http://asicstoic.blogspot.fr/2015/04/analog-design-basics-nmos.html it is introduced a typical example of an NMOS transistor usage: a current mirror.
And in the other blog entry http://asicstoic.blogspot.fr/2015/04/analog-design-basics-nmos.html it is introduced a characteristic Ids = f (Vds) of an NMOS transistor and a formula of Ids = f (Vds) in saturation:
Here is another term to define here: “voltage headroom”, meaning what is the minimum Vds to keep a current mirror functioning.
For a simple current mirror a voltage headroom is defined by minimum Vds to keep transistor M2 in active mode ( saturation ):
Vds = Vgs -Vt
On a different subject, so far every time we discussed NMOS transistor in saturation mode, there was an approximation assumed: in saturation mode Ids is independent of Vds. The approximation is possible under assumption that λ =0 (the channel-length modulation parameter )
In the ideal case when λ =0 that would mean that a change in Vds2 will not affect Ids2 ( ds2/Ids2 = infinity . This brings us to concept of r0 “output resistance” of the NMOS current mirror that in ideal case should be infinity large.
Obviously in our current mirror design we would like to achieve r0 as large as possible and can be proven that NMOS transistor r0 is approximately:
r0 = 1 * Ids and λ = 1/L
For a simple CMOS current mirror output resistance r0 is equal rds2.
One simple way to increase output resistance of a current mirror is to use following schematic, named “source-degenerated current mirror”
Here is necessary to introduce a concept of: transistor transconductance ( gm )
Transistor transconductance ( gm ) in transistor active region ( when Ids is independent of Vds ) how much Id changes with change of Vgs:
gm = ∂ID/∂VGS
And it can be proven that:
gm = μn * Cox * ( W/L ) * Veff or
- useful in circuit analysis when device sizes are fixed
- increasing Id implies proportional increase W/L ( if Veff is kept constant )
gm = 2 * ID / Veff ( useful in initial circuit design when transistor sizes are yet to be
determined )
It can be proven that a current mirror with source degradation has output resistance increased (1 + Rs*gm2) times comparing to a simple current mirror.
In other words when a small-signal resistance Rs is introduced at the source of both transistors in a simple current mirror, the output resistance is increased (1 + Rs*gm) times .
One of the major topologies of a current mirrors with increased output resistance is : “ a cascode current mirror “
First, note that the output resistance looking into the drain of Q2 is simply rds2 ( a simple current mirror ).
Second Q4 transistor should be considered as a current source with a source-degeneration resistor of value rds4.
Finally, output resistance of the cascode current mirror is :
rout = rds4[1 + rds2*gm4] ≅ rds4*(rds2*gm4)
Conclusion here is that the addition of a cascode device to a CMOS current mirror
increases its output resistance by approximately the gain of the cascode device (Q4) multiplied by rds4 ( rds4*gm4 ) .
A disadvantage of using a cascode current mirror is a reduced “voltage headroom”.
Let’s assume that all transistors of a cascode current mirror have the same sizes and ( by the virtue of a concept of a current mirror) the same currents. Then they will all also have the same Veff and, therefore, the same gate-source voltages ( because : VGS = Veff + Vt )
VG3 = VGS1 + VGS3 = 2Veff + 2Vt
VDS2 = VG3 – VGS4 = VG3 – (Veff + Vt) = Veff + Vt
Conclusion here is that transistor Q2 ( in a cascode current mirror ) needs a higher voltage Vds2 to get to the edge of a saturation mode then a transistor of a simple current mirror: exactly Vt higher.
Consequently, minimum allowed voltage on output of a cascode current mirror is:
Vout > VDS2 + Veff = 2 * Veff + Vt
again, is Vt greater than the minimum value of 2 * Veff.
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