Thursday, April 2, 2020

Successive Approximation Register (SAR) ADC algorithm - an example



 The SAR ADC is one of the most intuitive analog-to-digital converter algorithm and it can be implemented as a mix design circuit consisting of analog and digital part.

Let's imagine that we need to digitize an analog input signal in the range of 0-1V and that digital samples of the input signals will be represented as 8-bits values.
  • This means that a digital representation of continues analog signal in the range of 0-1V has to be represented with only 2^^8 (256) different values. Foe example: 
    • 0V is represented with a minimum 8 bit value decimal 0 or in binary 8'b0000_0000 and 
    • 1V is represented with maximum 8'bit value decimal 255 or in binary 8'b1111_1111
Since we have only 256 possible digital 8-bit values to represent continues analog signal in the range of 0-1V obviously we will  represent a sub-range of an input voltage with a single 8-bit value.This subrange/step size of the converter defines the converter's resolution.

e.g. 
  • 8'b0000_0000 digital value represents 0V analog input and first next digital value is 8'b0000_0001 that will represent 1V/255 = 0.003922 V if we assume precision on 6 decimal places ( meaning 0.003922 V is the resolution of our ADC in this example ) 
    • This means that we have to adopt a criteria that any input voltage, in the range bigger or equal to 0V and less than 0.003922, will be digitally coded with a value of 8'b0000_0000.
      • Further,  any input voltage in the range bigger or equal of 0.003922 but less than 0.007843( represents result of  2/255)  it will be digitally coded with a value of 8'b0000_0001 etc. etc. 
=> The final table looks like this:
  • There will be 256 ( for example 0, 1, 2....253, 254, 255 ), 8-bit  digital values  representation of the analog input in the range of 0-1V : 
Decimal digital value
Binary digital value
Input analog voltage [V]
Comment
        0
8'b0000_0000
0           
0 /255     = 0             V
        1
8'b0000_0001
0.003922
1 /255     = 0.003922 V  
        2
8'b0000_0010
0.007843 
2 /255     = 0.007843 V
        3
8'b0000_0011
0.011765 
3 /255     = 0.011765 V
.....
…..
…..
…..
        253
8'b1111_1101
0.988235 
253 /255 = 0.988235 V
        254
8'b1111_1110
0.996078 
254 /255 = 0.996078 V
        255
8'b1111_1111
1             
255 /255    = 1           V

And finaly Successive Approximation Register ADC algorithm to output for example a digital value 8'b0000_0001 when input signal is 0.003922 V looks like this:

1.    if  0.003922 V would be bigger or equal than 0.5 V ( this is maximum analog signal voltage of 1V divided by 2 ) MSB bit ( or bit 7)  of a digitized result would be 1 ( but that is not the case so result is 0 )
=> so far the digital result is: 8'b0xxx_xxxx

2.    if  0.003922 V would be bigger or equal than  0.25 V ( this is maximum analog signal voltage of 1V divided by 4 ) bit 6  of a digitized result would be 1 ( but that is not the case so result is 0 )
=> so far the digital result is: 8'b00xx_xxxx

3.    if  0.003922 V would be bigger or equal than  0.125 V ( this is maximum analog signal voltage of 1V divided by 8 ) bit 5  of a digitized result would be 1 ( but that is not the case so result is 0 )
=> so far the digital result is: 8'b000x_xxxx
4.    if  0.003922 V would be bigger or equal than 0.0625  V ( this is maximum analog signal voltage of 1V divided by 16 ) bit 4  of a digitized result would be 1 ( but that is not the case so result is 0 )
=> so far the digital result is: 8'b0000_xxxx
5.    if  0.003922 V would be bigger or equal than  0.03125 V ( this is maximum analog signal voltage of 1V divided by 32 ) bit 3  of a digitized result would be 1 ( but that is not the case so result is 0 ) 
=> so far the digital result is: 8'b0000_0xxx
6.    if  0.003922 V would be bigger or equal than  0.015625 V ( this is maximum analog signal voltage of 1V divided by 64 ) bit 2  of a digitized result would be 1 ( but that is not the case so result is 0 ) 
=> so far the digital result is: 8'b0000_00xx
7.    if  0.003922 V would be bigger or equal than  0.0078125 V ( this is maximum analog signal voltage of 1V divided by 128 ) bit 1  of a digitized result would be 1 ( but that is not the case so result is 0 )
=> so far the digital result is: 8'b0000_000x
8.    if  0.003922 V would be bigger or equal than  0.00390625 V ( this is maximum analog signal voltage of 1V divided by 256 ) LSB bit or bit 0  of a digitized result would be 1, which is the case.
=> and the final result is: 8'b0000_0001

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