Introduction: Why do we need CMOS transistors ?
A bipolar transistor needs a base current to keep the transistor ON. And this is the main problem for bipolars in spite of the fact that its base current is small in a small signal operation.
When bipolar transistor is used in power applications, as a switch, the base current could be really high, to keep the transistor ON, adding significantly to a power consumption ( e.g. a need for a extended battery life in portable electronics …. ).
In CMOS technology there are two complementary types of transistors—n-channel (NMOS) and p-channel (PMOS).
NMOS: How it works ?
NMOS transistor ( n channel device ) has three terminals: gate, source and drain. NMOS conducts with a positive gate voltage, and to distinguish between source and drain terminal: a source has a lower voltage.
As a positive gate voltage is applied, the gate attracts a negative charge forming a channel of mobile electrons connecting the drain and source regions.
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Vtn ( a threshold voltage for n channel device ) is the minimum positive voltage, when applied to a gate, that makes possible conducting electricity between the drain and source.
NMOS is OFF if Vgs < Vtn ( there is no channel formed and there is no possibility of a current flowing from drain to source ) .
Consequently NMOS is ON if Vgs > Vtn ( the channel is formed and if Vd > Vs, there will be a current Ids .
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Veff ( effective gate-source voltage ) is: Vgs -Vtn
Vtn ( a threshold voltage for n channel device ) is the minimum positive voltage, when applied to a gate, that makes possible conducting electricity between the drain and source.
Veff ( effective gate-source voltage ) is: Vgs -Vtn
NMOS modes of functioning: Linear vs Saturation mode
When NMOS is ON ( Vgs > Vtn ) and Vds << Veff, there is approximately linear relationship between Vds and Ids ( the linear mode ).
NMOS in Linear mode: Ids as linear function of Vgs
But if Vds > Veff , the channel charge concentration decreases close to the drain terminal ( the channel becomes pinched off ), making a current Ids constant (saturated ) and independent of further increase of Vds. This is the saturated mode.
NMOS in Saturation mode: Id independent of Vds because ( 1+ λ*Vds ) is approx.1
if Kn= μn * Cox *W/L then a formula of saturation Vgs = f(Id = Iref, Vds) is:
NMOS in Linear mode: Ids as linear function of Vgs
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NMOS in Saturation mode: Id independent of Vds because ( 1+ λ*Vds ) is approx.1
if Kn= μn * Cox *W/L then a formula of saturation Vgs = f(Id = Iref, Vds) is:
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NMOS transistor exits linear mode and enters the saturated mode when increasing Vds reaches this point:
Vds(saturated) = Vgs - Vtn = Veff
e.g. NMOS transistor application: Current Mirror
The design of current mirror is based on "copying" current from a precisely defined reference.
In a current mirror both NMOS transistors are in saturated mode, meaning Ids1 ( equal to Iref ) and Ids2 ( equal to Iout ) are independent of its respective Vds voltages and dependent only on its respective Vgs voltages.
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Vds1 = Vgs1= Vgs2
Vtn + 2Id1/(Kn*( 1+*Vds1) = Vtn + 2Id2/(Kn*( 1+*Vds2)
Id1/(1+*Vds1) = Id2/(1+*Vds2)
Under assumption that: 1+*Vds1= 1+*Vds2
Id1 = Id2
Vds1 = Vgs1= Vgs2
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